A. Field of the Invention
The present invention relates to semiconductor devices having a superjunction structure, exhibiting a high breakdown voltage and a high current capability, and applicable to MOS-type field-effect transistors (hereinafter referred to as “MOSFET's”), insulated-gate bipolar transistors (hereinafter referred to as “IGBT's”), and bipolar transistors. Hereinafter, the semiconductor devices having a superjunction structure will be referred to sometimes as the “superjunction semiconductor devices.”
B. Description of the Related Art
In the following descriptions, a superjunction semiconductor device is a semiconductor device that includes an alternating-conductivity-type layer including a column-shaped or layer-shaped p-type region and a column-shaped or layer-shaped n-type region adjoining each other repeatedly in parallel to the major surface of the semiconductor substrate. In other words, the alternating-conductivity-type layer is a drift layer that includes pn-junctions extending in perpendicular to the major surface of the semiconductor substrate. The drift layer that includes an alternating-conductivity-type layer makes a current flow in the ON-state of the device and sustains a bias voltage in the OFF-state of the device.
Generally, the semiconductor devices may be classified into a lateral semiconductor device and a vertical semiconductor device. In the lateral semiconductor device, the electrodes are formed on one major surface of a semiconductor substrate and a main current flows along the major surface. In the vertical semiconductor device, the electrodes thereof are distributed onto the major surfaces of a semiconductor substrate and a main current flows between the electrodes on the major surfaces.
In the vertical semiconductor device, the direction of a drift current flowing in the ON-state of the device is the same as the direction of a depletion layer expansion by a bias voltage in the OFF-state of the device. For example, the high resistivity n− drift layer in the usual planar-type n-channel vertical MOSFET works as a region that makes a drift current flow vertically in the ON-state of the MOSFET and is depleted to sustain a bias voltage in the OFF-state of the MOSFET.
If the current path in the high resistivity n− drift layer is short, the drift resistance will be low in the ON-state of the MOSFET. Therefore, the short current path is effective to lower the substantial ON-state resistance of the MOSFET. However, if the current path in the high resistivity n− drift layer is short, the width, for which the depletion layer extending from the pn-junction between the p-type base region and the n− drift layer expands in the OFF-state of the MOSFET, will be narrow, causing a low breakdown voltage. In order to obtain a semiconductor device with a high breakdown voltage, the n− drift layer should be thick. A thick n− drift layer causes high on-resistance and loss increase inevitably. In other words, there exists a tradeoff relationship between the on-resistance and the breakdown voltage. It is well known that the tradeoff relationship holds in the semiconductor devices such as IGBT's, bipolar transistors and diodes. The tradeoff relationship also holds commonly in the lateral semiconductor devices where the direction of the drift current flowing is different from the direction of the depletion layer expansion.
One way of solving the tradeoff relationship issue is to increase the impurity concentrations in the drift layer and to provide the drift layer with a superjunction structure that includes an alternating-conductivity-type layer including a n-type semiconductor region and a p-type semiconductor region arranged alternately. The superjunction semiconductor device forms the drift layer thereof of the alternating-conductivity-type layer described above to reduce the on-resistance and to deplete the drift layer quickly in the OFF-state further to make the depleted drift layer sustain a bias voltage. Therefore, the superjunction semiconductor device facilitates improving the tradeoff relationship described above.
The superjunction semiconductor device is different from the usual planar-type n-channel vertical MOSFET in that the drift layer in the superjunction semiconductor device is not a uniform layer of one conductivity-type but rather an alternating-conductivity-type layer including a column-shaped or layer-shaped n-type drift region and a column-shaped or layer-shaped p-type partition region adjoining each other repeatedly in parallel to the major surface of the semiconductor substrate to form a pn-junction therebetween and to extend the pn-junctions in perpendicular to the major surface of the semiconductor substrate. The impurity concentrations in the drift layer including n-type drift regions and p-type partition regions are set to be higher than the impurity concentration in the drift region in the usual vertical MOSFET exhibiting an almost equivalent breakdown voltage. The widths of the n-type drift region and p-type partition region are controlled to be narrow enough so that they are depleted by a lower bias voltage.
To provide a semiconductor device with a high breakdown voltage, it is necessary to form an edge-termination section that surrounds circularly the active section, in which the main current flows. If the edge termination section is not formed, the breakdown voltage will be low due to a high electric field in the edge area of the drift layer and it will be difficult to obtain a high breakdown voltage. Moreover, even if an initial high breakdown voltage is maintained by the provision of the edge termination section, it will be difficult for a semiconductor device that exhibits low robustness against induced charges to guarantee a long-term reliability for the breakdown voltage.
In a semiconductor device that exhibits low robustness against surface charges, the space charges induced onto the insulator film surface on the edge termination section affect the depletion layer expansion adversely and lower the breakdown voltage with the passage of time. In the following descriptions, the semiconductor device that exhibits high or excellent robustness against induced charges is a semiconductor device that facilitates suppressing the adverse effects of the charges, induced from the outside onto the insulator film surface on the edge termination section, on the depletion layer expansion in the edge termination section and keeping the initial breakdown voltage even after the passage of a predetermined operating time. In other words, the semiconductor device that exhibits high or excellent robustness against induced charges is a semiconductor device that exhibits a high reliability for breakdown voltage.
As a semiconductor device that improves the reliability for breakdown voltage thereof, a semiconductor device that includes guard rings in the edge termination section is known. In the semiconductor device, the guard rings are connected electrically to the electrically conductive field plates connected in the forward and reverse voltage directions. Even if positive and negative charges exist on the edge termination section, the semiconductor device that includes the edge termination section as described above will weaken the adverse effects of the positive and negative charges on the depletion layer expansion in the vicinity of the device surface. As a result, the breakdown voltage is prevented from varying and the robustness against induced charges is improved.
Japanese Unexamined Patent Application Publication No. 2003-204065 (Paragraph 0038) describes a superjunction semiconductor device which includes, in the edge termination section, a field plate on an alternating-conductivity-type layer and a guard ring in the surface portion of the alternating-conductivity-type layer. Japanese Unexamined Patent Application Publication No. 2005-203565 (Paragraph 0013) describes a superjunction semiconductor device which includes a field plate on the alternating-conductivity-type layer in the edge termination section. The superjunction semiconductor device disclosed in these two documents exhibit a high breakdown voltage.
Japanese Unexamined Patent Application Publication No. 2003-224273 (Abstract) describes a first superjunction semiconductor device as described below. In the edge termination section around the first alternating-conductivity-type layer in the active section, the pitch and impurity concentrations in the second alternating-conductivity-type layer are set to be the same as the pitch and impurity concentrations in the first alternating-conductivity-type layer in the active section. Lightly doped p- and n-type regions are formed in the surface portions of the respective p- and n-type regions in the second alternating-conductivity-type layer in the edge termination section.
In a second superjunction semiconductor device disclosed in Japanese Unexamined Patent Application Publication No. 2003-224273, a third alternating-conductivity-type layer is formed on the second alternating-conductivity-type layer in the edge termination section. The direction of the alternating arrangement of the lightly doped p- and n-type regions in the third alternating-conductivity-type layer is perpendicular to the direction of the alternating arrangement of the p- and n-type regions in the second alternating-conductivity-type layer and heavily doped p-type regions are formed in the surface portion of the third alternating-conductivity-type layer.
Japanese Unexamined Patent Application Publication No. 2003-115589 (Abstract) describes a superjunction semiconductor device as described below. In the edge termination section around the first alternating-conductivity-type layer in the active section, the pitch and impurity concentrations in the second alternating-conductivity-type layer are set to be the same as the pitch and impurity concentrations in the first alternating-conductivity-type layer in the active section. A lightly doped n-type region is formed in the surface portion of the second alternating-conductivity-type layer and heavily doped p-type regions are formed in the surface portion of the lightly doped n-type region.
The structures described above relax the surface electric field in the edge termination section in the vicinity of the active section and hold a high breakdown voltage. Although the designed breakdown voltage is maintained initially, the breakdown voltage will lower gradually sometimes, if positive charges (positive ions) are induced on the edge termination section in the superjunction semiconductor devices disclosed in these latter two documents due to the reason described below.
Next, a device that includes a lightly doped alternating-conductivity-type layer arranged in the surface portion of the edge termination section is considered. Since a depletion layer expands easily in the surface of the alternating-conductivity-type layer and the electric field is relaxed, it is possible to obtain a higher breakdown voltage. However, as positively-charged ions are induced on the insulator film in the edge termination section, the depletion layer tends to hardly expand gradually, the electric field becomes higher around the field plate edge and the breakdown voltage lowers with passage of time. Therefore, it is considered that robustness against induced charges has not been taken yet.
Moreover, for holding the breakdown voltage characteristics, it is necessary for the superjunction semiconductor device disclosed in Japanese Unexamined Patent Application Publication No. 2003-115589 to form a uniform lightly-doped n-type surface region straddling the alternating-conductivity-type layer. Due to the additional steps for forming the n-type surface region, the manufacturing costs of the superjunction semiconductor device increase. It is necessary to dope the n-type surface region more lightly than the n-type drift region in the active section. However, it is difficult to controllably dope the n-type surface region more lightly than the n-type drift region in the active section.
In view of the foregoing, it would be desirable to solve the issues described above. It would be also desirable to provide a superjunction semiconductor device that facilitates manufacturing the edge termination section thereof exhibiting a high breakdown voltage and a high reliability for breakdown voltage through a process that exhibits a high mass-productivity. The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.